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Comment: Migrated to Confluence 4.0

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Opcode

Format

Description

00

[C1 C0] [Dest1 Dest0] [Src1 Src0] [Val3 Val2 Val1 Val0]

Move from 
SRC to DEST

 

Dest10: 00 = ACC, 01 = LR, 10 = ACC low 4 bits, 11 = ACC high 4 bits

 

 

Src10: 00 = ACC, 01 = LR, 10 = IR low 4 bits sign extended, 11 = all 1s

 

01

[C1 C0] [Op2 Op1 Op0] [Src1 Src0] [Dest0] [Val1 Val0]

Binary operator
DEST = DEST op SRC

 

Op210: 000 = add, 001 = sub, 010 = shift left, 011 = shift right maintain sign bit

 

 

Op210: 100 = xor, 101 = and, 110 = rotate left, 111 = rotate right

 

 

Src10: 00 = ACC, 01 = LR, 10 = IR low 2 bits sign extended, 11 = all 1s

 

 

Dest0: 0 = ACC, 1 = LR

 

10

[C1 C0] [U3 U2 U1 U0] [Addr3 Addr2 Addr1 Addr0]

Branch to ADDR

11

[C1 C0] [Src0] [U2 U1 U0] [Addr3 Addr2 Addr1 Addr0]

Branch to ADDR if SRC is 0

 

Src0: 0 = ACC, 1 = LR

With these instructions, we were able to implement loops, as well. 

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