Task 5 was to test the circuit in a gtkwave simulation. As we can see, the clock moves forward at certain intervals, and the lights output is changing based on what the irview is. There is a bit of a lag due to the clock timing, but one can see, for example, that lightsig is 00 at first, then when irview is 101 (the instruction to invert the bits), it becomes FF. In other words, the bits go from being all 0s to being all 1s, represented in hex in this case.
For Task 6, we had to set the code up so that it would work with a physical circuit. This was just a matter of setting up the pins, then changing the clock, for our purposes, to go 32 million times slower than the actual internal clock so we could see our results. A video of me testing my circuit is below. As we can see, the board cycles through all of the instructions we gave it in the lightrom, represented by the red LEDs, and the output is represented by the green LEDs.
In Task 7, we had to create two more VHD files with sets of instructions like in lightrom. The ones I made are shown below.
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I did the first extension, too. This was to make the a longer program, which meant that "addr" would need to have (at least) another bit. So I changed the kind of vector addr was to a 4 down 0 one instead of 3 downto 0 like it was before. Everywhere that needed a change in amount of bits was changed from 4 to 5. Then, the only other adjustment was giving more instructions -- 32 in total -- to the machine to test if it worked. My test program is shown below:
Next, I did extension 2, which was to add instructions to the system. One could have made more instructions directly by giving the data (red light) 4 bits instead of 3, for example, but I decided to indirectly make branch directions by having certain inputs equal different things if a certain condition was true. If 101 was input, for instance, the branch1 variable would be true, and it would mean that the next time the execute state was entered, it would follow different rules. An input of 111 in the first branch would take us into the second branch, too. Some instructions could be used to exit each branch, as well. Looking back, I could have implemented this using different kinds of Execute states, as well, but this worked as it should have anyways, as shown below:
This project taught me a lot about VHDL, more so than any project so far, because we did everything in it without using any block diagram files like the past times. I also gained a lot of experience using Moore state machines. This project was a very intuitive one that I had little trouble following.